Application of Instruction Analysis/Synthesis Tools to x86’s Functional Unit Alloation1

نویسندگان

  • Ing-Jer Huang
  • Ping-Huei Xie
چکیده

Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the important design issues is the measurements of the distribution of functional unit usage and the micro operation level parallelism (MLP), which together determine the proper allocation of functional units in the superscalar architecture. To obtain such measurements, an x86 instruction set CAD system x86 Workshop is developed, which consists of both instruction set analysis and optimization tools. Based on the measured results, the most cost effective functional unit combination is suggested. 1. This work is supported by NSC under contract numbers 85-2262-E-009-010R and 86-2262-E-009-009. Submitted to ISSS 1998g Application of Instruction Analysis/Synthesis Tools to x86’s Functional Unit Alloation 2

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Analysis of ×86 instruction set usage for DOS/Windows applications and its implication on superscalar design

The understanding of instruction set usage in typical DOS/Windows applications plays a very important role in designing high performance x86 compatible microprocessors. This paper presents the tools to such analysis, the analysis results, and their implications on the design of a superscalar processor, based on a RISC core, for efficient x86 instruction execution. The analysis tools include mon...

متن کامل

Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors

This paper presents the development of instruction analysis/scheduling CAD techniques to measure the distribution of functional unit usage and the micro operation level parallelism (MLP), which together determine the proper functional unit allocation for superscalar microprocessors, such as the x86 microprocessors. The proposed techniques fit in the early design exploration phase in which the t...

متن کامل

Analysis of x86 Application and System Programs via Machine-Code Verification

Ensuring the reliability of high-level programs is becoming more difficult with the ever-increasing complexity of computing systems. Although automatic program analysis tools have found great success in industrial applications, they have limited scope because they target specific kinds of undesirable behavior, such as buffer overflows. Incorrect compiler transformations and the absence of analy...

متن کامل

An End-to-End Design Flow for Automated Instruction Set Extension and Complex Instruction Selection based on GCC

Extensible processors are application-specific instruction set processors (ASIPs) that allow for customisation through user-defined instruction set extensions (ISE) implemented in an extended micro architecture. Traditional design flows for ISE typically involve a large number of different tools for processing of the target application written in C, ISE identification, generation, optimisation ...

متن کامل

Design of Instruction Address Queue for High Degree X86 Superscalar Architecture

A major hurdle of recent x86 superscalar processor designs is limited instruction issue rate due to the overly complex x86 instruction formats. To alleviate this problem, the machine states must be preserved and the instruction address routing paths must be simplified. We propose an instruction address queue, whose queue size has been estimated to handle saving of instruction addresses with thr...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2000