Application of Instruction Analysis/Synthesis Tools to x86’s Functional Unit Alloation1
نویسندگان
چکیده
Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the important design issues is the measurements of the distribution of functional unit usage and the micro operation level parallelism (MLP), which together determine the proper allocation of functional units in the superscalar architecture. To obtain such measurements, an x86 instruction set CAD system x86 Workshop is developed, which consists of both instruction set analysis and optimization tools. Based on the measured results, the most cost effective functional unit combination is suggested. 1. This work is supported by NSC under contract numbers 85-2262-E-009-010R and 86-2262-E-009-009. Submitted to ISSS 1998g Application of Instruction Analysis/Synthesis Tools to x86’s Functional Unit Alloation 2
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